The present invention relates to a semiconductor device, and more particularly, to a test circuit for testing if an internal command signal is normally generated or not.
The development of semiconductor memory device design and fine processing technology enables Mega integration and multi-function.
However, as line width decreases due to the high integration of the semiconductor memory device, processing fail probability increases during the manufacturing processes, causing further decrease in the yield of semiconductor devices.
FIG. 1 is a diagram of a conventional screening test at a wafer level.
As shown, the conventional screening test is performed to detect dynamic random access memories (DRAMs) where fail occurs at the wafer level.
The screening test detects the fail of the semiconductor memory device by performing a probing test at a wafer level during fabrication of the semiconductor memory devices.
However, when the semiconductor memory device is packaged, there may occur a fail that could not be detected through the probing test at the wafer level. In other words, there may exist a fail that occurs only at a package level of the semiconductor memory device.
Meanwhile, when the semiconductor memory device is packaged, it is impossible to perform the probing test in the same manner as at the wafer level.
For example, when an active command, a write command, and a read command are sequentially inputted from an external circuit after the packaging process, the probing test cannot be performed although there occurs a fail in which data corresponding to the read command is not outputted. Therefore, it is impossible to know whether the fail occurs in the active command or in the write command.